/*
 * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE file.
 */

#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE

#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_CONTROLLER_INSTANCES 2
#define USB_EHCI_TEGRA_BASE_ADDR_USB3   0xC5008000      /* USB3 base address */
#define USB_EHCI_TEGRA_BASE_ADDR_USB1   0xC5000000      /* USB1 base address */
#define CONFIG_USB_EHCI_DATA_ALIGN      4

/*
 * This parameter affects a TXFILLTUNING field that controls how much data is
 * sent to the latency fifo before it is sent to the wire. Without this
 * parameter, the default (2) causes occasional Data Buffer Errors in OUT
 * packets depending on the buffer address and size.
 */
#define CONFIG_USB_EHCI_TXFIFO_THRESH   10

#define CONFIG_EHCI_IS_TDI
